Abstract

In this paper, the effects of hot carrier stress (HCS) and constant voltage stress (CVS) on NMOSFETs with a HfSiO gate dielectric have been investigated. In the case of the poly gate electrode, the stress bias dependant positive charge, attributed to the hole generation/trapping process, may complicate the evaluation of the CVS and HCS. Based on a comparison of CVS and HCS dependence of the V/sub th//g/sub m//I/sub d/spl I.bar/sat/ parameters, we showed the feasibility of separating the reversible charge trapping induced degradation from the permanent damage using a negative bias. Accumulated HCS induced degradation has been shown in g/sub mmax/ with a TiN gate device, while poly gate devices show only the reversible V/sub th/ shift, dominated by the charge trapping that does not generate permanent damage.

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