Comparison of high temperature annealed Czochralski silicon wafers and epitaxial wafers

Abstract

High temperature annealing of Czochralski Si wafers in Ar or hydrogen ambients reduces as-grown crystal defects close to the surface of Si wafers. This results in improved electrical properties and an oxygen denuded zone. The depth profile of the defect density and the defect size distribution is investigated by removing successive Si layers by polishing and analyzing crystal originated particles. The efficiency of dissolving crystal defects by annealing was found to depend significantly on the size distribution of the defects of the as-grown Czochralski Si wafers. The results are compared with the characteristics of epitaxial grown Si wafers. The distinctly lower defect level of epitaxial wafers is responsible for their superior performance in device processes.