Comparison of enhancement/depletion inverter speed in bulk Si and SOI circuits

Abstract

The speed performance in bulk Si and SOI structures are compared both experimentally and theoretically, using ring oscillators as a basis for comparison. Short channel devices were obtained in laser crystallized poly-Si, using rapid thermal anneal for source and drain implant activation to avoid grain boundary diffusion. For a 2.0 µm design rule ring oscillator, a propagation delay per stage of 115 pS was obtained which is not only the fastest ever achieved with an SOI structure, but also a factor of 2 faster than the same circuit in bulk Si. A recently developed propagation delay model was applied to analyze the ring oscillator delay for SOI and bulk Si. The results demonstrate quantitatively the speed improvement due to reduced parasitic capacitance in the SOI structure.