Abstract
The paper presents a summary of different double second-order generalized integrator (DSOGI)-based phase-locked loop (PLL) algorithms for synchronization with three-phase weak grids. The different methods are compared through simulation under a variety of grid conditions, such as unbalanced phase voltages, high low-order harmonics distortion, frequency steps, phase jumps, and voltage sags. Following the simulation results, the three methods that have shown the overall best results are compared through an experimental setup for further results validation under operation with a voltage-source converter. Based on the obtained results, a benchmark table is presented that allows ranking the performance of the tested methods for different expected grid conditions.
Highlights
Microgrids are currently an extensive topic of discussion since such a concept presents a viable solution to allow the integration of distributed energy resources near loads without disturbing or contributing to the stability of the main grid
As suggested in [12], the double second-order generalized integrator (DSOGI) consists of two SOGI-QSG, which allows extracting the positive sequence of the three-phase voltage through the positive sequence calculator (PSC) (5), where qvα and qvβ are obtained through two different SOGI-QSGs
To compare the different SOGI-based phase-locked loop (PLL) performance under severe grid conditions of a weak grid, several simulations are performed in Matlab/Simulink
Summary
Microgrids are currently an extensive topic of discussion since such a concept presents a viable solution to allow the integration of distributed energy resources near loads without disturbing or contributing to the stability of the main grid. As an alternative to digital filters, there can be found methods that suggest the use of discrete Fourier transform, Kalman filters, least mean square [5], or sliding mode control [6] Another method, and the most common synchronization technique in grid-tied power converters, is the closed-loop approach known as the synchronous reference frame phaselocked loop (SRF-PLL). A second-order low pass filter is applied at the output to reduce harmonics interference in the positive sequence synchronous voltage estimation Another method is based on the single-phase enhanced PLL (EPLL). The PI gains kp and ki are tuned in accordance with [3] and synthesized in Equation (2), where ωc represents the filter natural (or controller) frequency, ζ the damping, and Eg the grid peak voltage amplitude
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