Comparison of Current Suppression Methods to Enhance Short Circuit Capability of 1.2 kV SiC Power MOSFETs: A New Approach using a Series-connected, Gate-Source-Shorted Si Depletion-Mode MOSFET vs Reduced Gate Bias Operation

Abstract

Silicon carbide power MOSFETs are under development to replace silicon IGBTs for high-efficiency power conversion applications. Commercial SiC power MOSFETs have a short-circuit (SC) capability inferior to those of Si IGBTs, thus constraining their widespread use. Gate drive voltage levels for SiC power MOSFETs can be reduced to increase SC capability but this results in a large increase in on-resistance. This paper presents a new method, with a series-connected Gate-Source-Shorted (GSS) Si Depletion-Mode (DM) MOSFET, to enhance the short-circuit capability of SiC power MOSFETs and compares its performance with the gate drive level adjustment approach for the first time. The SC capability of a 1.2kV SiC power MOSFET operating at 800V with a gate bias of 20V is demonstrated to improve from $4.8\boldsymbol{\mu} \mathbf{s}$ to beyond $7.5\boldsymbol{\mu} \mathbf{s}$ with only 17% increase in on-resistance using the new approach, whereas the gate drive level adjustment method produces a similar improvement in SC capability with a 66% increase in on-resistance. Measured static and dynamic characteristics demonstrate less than 20% increase in switching power loss using the new method. The new method also provides a voltage sensing node at the drain of the GSS Si DM MOSFET for detection of SC events, which is not available in the case of the conventional single SiC MOSFET.