Abstract
We have investigated the interesting double ion implant (DII) Ti–salicide and pre-amorphization implant (PAI) Co–salicide techniques for ultra-large-scale integration (ULSI) applications. The DII technique is combined with germanium (or arsenic) PAI and Si ion-mixing processes. The sheet resistances both of n+ and p+ polysilicons are decreased when the DII Ti–salicide and PAI Co–salicide techniques are used. Moreover, the incomplete phase transformation of Ti–salicide is not observed in 0.2 μm wide polysilicon devices with the Ge DII process. Furthermore, the n+/p-well junction leakage current is reduced when the Si ion-mixing process is used. Experimentally, based on the studied DII Ti–salicide and PAI Co–salicide techniques, high-performance 0.2 μm CMOS devices have been successfully fabricated.
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