Abstract
Problem statement: This study mainly to study the effect of several commercial underfill materials to the reliability of HiCTE Flip Chip Ceramic Ball Grid Array (FC-CBGA) package due to Accelerated Thermal Cycling (ATC) effect. Approach: The warpage condition of package, die back stress, interfacial die shear stress, and solder bump fatigue for different commercial underfills were assessed and compared via a commercial Finite Element Analysis (FEA) under JEDEC Standard of ATC. The thermo-mechanical properties of underfills for simulation were obtained by using Thermal Mechanical Analyzer (TMA) and Dynamic Mechanical Analyzer (DMA). The actual package of HiCTE FC-CBGA were assembled with those underfill materials and underwent ATC to be compared with FEA result. Results: The results from FEA and experimental were discussed to characterize the performance of each underfill material. The results of this study indicate that the underfill materials investigated, those with a glass transition temperature (Tg) and a Young’s modulus of approximately above 105°C and 8-9 GPa, respectively, were appropriate for HiCTE FC-CBGA with high lead solder bumps. Conclusion: The result from FEA analysis and ATC reliability test found that the underfill materials with high and medium low Young’s modulus has high reliability in FC-CBGA package.
Highlights
To meet the strict demands for smaller product size, lighter weight, and higher interconnection densities in electronics packaging, flip chip device have been developed
Underfill material properties: Five different types of new commercial underfills from five suppliers were selected based on their suitability for medium large die and fine pitch cu/low-k HiCTE Flip Chip Ceramic Ball Grid Array (FC-CBGA)
Due to consistent test method compared with data obtained from suppliers, material analysis using Thermal Mechanical Analyzer (TMA) and Dynamic Mechanical Analyzer (DMA) were conducted in-house for obtaining underfill thermomechanical properties (Yi et al, 2000)
Summary
To meet the strict demands for smaller product size, lighter weight, and higher interconnection densities in electronics packaging, flip chip device have been developed. The reliability of these packages can be improved significantly with the use of underfill materials (Suryanarayana et al, 1993). The necessity of using an underfill for improving flip chip device reliability is well documented (Chen et al, 2006; Paquet et al, 2006). Underfill can improve the reliability life of flip-chip device as much as ten folds which provided environmental protection to the device, and to distribute the stress imposed by Coefficient Thermal Expansion (CTE) mismatch between silicon chip and substrate. The stress on the device can be reduced and the reliability of the device can be enhanced (Xuefeng et al, 2009; Lau et al, 2000; Fan et al, 2001)
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