Abstract
The scaled charge trapping (CT) type silicon on insulator (SOI) FinFET flash memories with different blocking layer materials of Al2O3 and SiO2 have successfully been fabricated, and their electrical characteristics including short-channel effect (SCE) immunity, threshold voltage (Vt) variability, and the memory characteristics have been comparatively investigated. It was experimentally found that the better SCE immunity and a larger memory window are obtained by introducing a high-k Al2O3 blocking layer instead of a SiO2 blocking layer. It was also confirmed that the variability of Vt before and after one program/erase (P/E) cycle is almost independent of the blocking layer materials.
Highlights
Device scaling is very effective for the fabrication of high-density and low-cost flash memories.further scaling of conventional bulk planar MOSFET type flash memories becomes very difficult because of the increased short-channel effect (SCE) and the lowered source-drain (SD)breakdown voltage (BVDS) with scaling down device size [1–3]
The scanning electron microscopy (SEM) images of the fabricated MANOS type silicon on insulator (SOI)-fin-type double-gate (DG) MOSFET (FinFET) flash memory after fin-channel formation and gate formation are shown in Figure 3a,b, respectively
It can be seen from scanning transmission electron microscopy (STEM) images that the charge trapping ONA and ONO layers are formed around the top and sidewalls of the fin-channels and extended to the recessed BOX region
Summary
Device scaling is very effective for the fabrication of high-density and low-cost flash memories. In the NOR-type flash memory, further scaling of device size faces the theoretical limit of BVDS which corresponds to the silicon (Si) and silicon dioxide (SiO2) conduction band difference (3.2 eV) This indicates that channel hot electron (CHE) programming cannot be guaranteed in the scaled NOR-type flash memories with gate length (Lg) smaller than 100 nm [2,3]. As a high-k blocking layer, an Al2O3 layer has been used in the planar MOSFET type and body-tied bulk FinFET type flash memories [28,34] By introducing such a high-k blocking layer, the gate injection current is effectively suppressed during program/erase (P/E) operations because the electric field across the blocking layer is proportionally reduced owing to its high dielectric constant, which is useful for the enlarging of memory window. SiO2, and comparatively investigate their electrical characteristics including SCE immunity, Vt variability and memory characteristics [43]
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