Abstract

Technology scaling below 22 nm has brought several detrimental effects such as increased short channel effects (SCEs) and leakage currents. In deep submicron technology further scaling in gate length and oxide thickness can be achieved by changing the device structure of MOSFET. For 10–30 nm channel length multigate MOSFETs have been considered as most promising devices and FinFETs are the leading multigate MOSFET devices. Process parameters can be varied to obtain the desired performance of the FinFET device. In this paper, evaluation of on-off current ratio (Ion/Ioff), subthreshold swing (SS) and Drain Induced Barrier Lowering (DIBL) for different process parameters, that is, doping concentration (1015/cm3 to 1018/cm3), oxide thickness (0.5 nm and 1 nm), and fin height (10 nm to 40 nm), has been presented for 20 nm triangular FinFET device. Density gradient model used in design simulation incorporates the considerable quantum effects and provides more practical environment for device simulation. Simulation result shows that fin shape has great impact on FinFET performance and triangular fin shape leads to reduction in leakage current and SCEs. Comparative analysis of simulation results has been investigated to observe the impact of process parameters on the performance of designed FinFET.

Highlights

  • To continue with the pace of Moore’s law, reduction in transistor dimensions causes very significant short channel effects in device

  • Simulation results show that the variation of process parameters of FinFET has considerable impact on performance parameters of the FinFET

  • On-off current ratio sharply decreases with decrease in doping concentration and increase in fin height

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Summary

Introduction

To continue with the pace of Moore’s law, reduction in transistor dimensions causes very significant short channel effects in device. Better electrical control is provided by the wrap-around gate structure and leakage current and short channel effects are reduced. FinFET has several advantages compared to planar devices such as well suppressed short channel effects, reduced subthreshold swing (∼70 mV/dec), and small threshold voltage roll-off [3]. Rectangular cross section fins are commonly used for design and analysis of FinFET but they are rarely found in industry. Evaluation of on-off current ratio (Ion/Ioff ), subthreshold swing (SS), and Drain Induced Barrier Lowering (DIBL) for various process parameters, that is, doping concentration (Nch), oxide thickness (Tox), and fin height (Hfin), has been presented for 20 nm triangular FinFET device. By considering the quantum effects, more practical environment is provided for device simulation.

Literature Review
Device Design and Simulation Setup
Results and Discussion
Conclusion
Conflicts of Interest
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