Abstract
This paper focuses on the implementation of two pulse width modulation (PWM) techniques on a reduced-component multilevel inverter which reduced the number of power switches along with the voltage sources used. The reduced components multilevel inverter has two circuits; level circuit and polarity circuit. The level circuit is used for producing voltage levels, whereas polarity is a conventional H-bridge used for reversing output voltage levels. The reduction in harmonics is primarily dedicated by the switching technique used to control the power switches. In this paper, two PWM techniques were applied to the presented inverter to investigate the change in the switching signal period on ripple contents and total harmonic distortion (THD) with a closed-loop voltage control system. In the closed-loop system, a conventional PI controller is used to regulate the load voltage to achieve an output voltage near to sinusoidal. MATLAB/SIMULINK has been used to analyze the overall performance of the multilevel inverter based on seven-level operation under both PWM techniques. The simulation results show that the first PWM technique, which has a low switching time for the power switches, has an influence on the THD and the ripple content by about a 6 percent reduction compared with the second technique.
Highlights
Received: 23 November 2020/ Accepted: 5 December 2020 : Power electronics development has drawn much of the researcher's attention for its high performance and power capability [1]
The MATLAB/SIMULINK is designed to present the validity of the reduced-component multilevel inverter during operation with two separate pulse width modulation (PWM) control techniques when connected to the resistive load
The simulation results for the closed-loop voltage control system for a seven-level inverter with resistive load under PWM Tech-I are shown in Fig. 6, Fig. 7, and Fig. 8
Summary
Received: 23 November 2020/ Accepted: 5 December 2020 :. As a result of the need for low total harmonic distortion (THD) and high efficiency, a demand for high voltage rating multilevel inverter (MLI) has grown. The three most popular MLI topologies are diode-clamped MLI, flying capacitor MLI, and cascaded H-bridge MLI [8]–[10] All these common topologies suffer from a high number of switching devices and result in high switching losses, low efficiency, and high overall topology costs for higher rated applications. The most challenging issue is how to achieve low THD output voltage, low filter circuit, low cost and high efficiency In this case, a reduction in the number of switching devices components is considered to be the solution to this problem.
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