Compact Thermal Modelling of Sub-20-nm Nanowire MOSFETs for Circuit Applications

Abstract

Short channel effects (SCE) and self-heating be- comes more critical as the technology reaches on the nanoscale. Nanowire MOSFETs are an assuring candidate for coming CMOS technology. Due to the self-heating carrier mobility is decreased, which results in drain current degradation. Self- heating consequences in sub-20-nm Nanowire MOSFETs are studied and a compact thermal model is proposed in this work applying well-calibrated three-dimensional TCAD electro- thermal simulations. In this work, we observed that a different characteristic result of channel length towards thermal resistance. When the channel length is reduced, thermal resistance appears to be down gradually. The model is successfully implemented in BSIMCMG compact model. Compact thermal model for Nanowire MOSFET is proposed based on empirically extracted equations on different device parameters like channel length, nanowire thickness, nanowire height and fin pitch. The model may remain helpful for the evaluation of thermal resistance in Nanowire MOSFETs with large layouts.