Compact Single-Phase-Search Multistate Content-Addressable Memory Design Using One FeFET/Cell

Abstract

Content-addressable memories (CAMs) are widely used for data-centric applications where one must search for data patterns. CMOS CAMs can incur large areas and, hence, power consumption. Nonvolatile (NV) devices, such as ferroelectric field-effect transistors (FeFETs) and resistive random access memories, have been used in the design of NV CAMs to improve both logic density and power consumption. To further improve logic density, this article proposes a compact, multistate CAM (MCAM) that can store 3 bits in a cell using just one FeFET and three FinFETs per cell. Moreover, the proposed MCAM does not require a precharging phase for search as is typical with other CAM designs, which can lead to improved performance. Simulations with experimentally calibrated 22-nm FeFET and 22-nm FinFET technology models suggest that the proposed 3T1Fe-MCAM can perform up to 7.1× faster search operations with up to 28.8× lower area-energy-delay product compared with state-of-the-art ternary/analog CAM designs. To show that the proposed MCAM array can accurately detect all worst case matches/mismatches, we design an MCAM array with 11 cells per row (to represent a 32bit number). We also study how the nonidealities related to programming/search voltages impact performance metrics and show that the proposed MCAM can tolerate up to 15-mV noise during programming and up to 20-mV noise on search voltages even in a worst case match/mismatch.