Abstract
The main objective of this paper is to minimize the error correction hardware for single fault tolerance in residue number systems (RNS). With this objective, a new approach for the design of an error calculator for single fault tolerance in RNS arithmetic is presented. It corrects the error concurrently during normal operation. Furthermore, instead of using a single look-up table as in previous approaches, the computation of each error is achieved in parallel by a number of smaller look-up tables, using each redundant moduli independently. This brings forth a considerable reduction in the total error calculator hardware. Two error correction approaches are presented; one for tolerating the error at the final binary output, and the other for correcting the error in each residue digit. The former uses more hardware but is faster, whereas the latter uses less hardware and is slower.
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