Compact Modeling and Analysis of Charge and Device Capacitance for SELBOX Junctionless Transistor

Abstract

A charge based compact drain current and capacitance modeling has been developed to describe the transfer and Capacitance-Voltage characteristics of the proposed device. The inversion charge density of the proposed model is defined on the basis of the surface potential model equation at the source and the drain end. These inversion charges are evaluated by the Ward Dutton partition method using the current continuity principle and charge balance equations. Using these inversion charges, a drain current model is discussed for the proposed device, which is based on implicit unified charge control expression. This model defined all the possible intrinsic capacitances analytically derived by the terminal charges associated with the terminal voltages. This compact model is valid in the weak, moderate and strong regime of the device operation. The transfer characteristics of the drain current and C-V characteristic of capacitances have been validated using 2-D numerical simulation.