Abstract

We propose a compact highly-efficient CMOS-compatible polarization splitter and rotator (PSR) with a wide bandwidth covering the whole O-band. It benefits from the different confinement capability of TE and TM modes in bend structure. This bend structure helps shorten the PSR and maintain high efficiency, achieving the bending, polarization splitting, rotating of light beam at the same time. Numerical simulations utilizing Lumerical 3-D FDTD solutions demonstrate that the present PSR has a high TM-TE conversion efficiency of -0.11 dB and high TE-TE conversion efficiency of -0.09 dB at 1310 nm, while the extinction ratio is 27.36 dB and 30.61 dB respectively.

Highlights

  • As essential building blocks, polarization beam splitter and rotator (PSR) plays a significant role in most photonic integrated circuits where polarization handling is needed, including telecom, datacom, quantum circuits, etc [1, 2]

  • Compact and highly efficient PSR is desired for manipulating polarization-entangled photons [3] as well as coherent transceivers in largescale high-density photonic integrated chips

  • In order to have a complete coupling of TM mode supported by the inner bend and TE mode supported by the outer bend, theoretically these two bends need proper cross sections for satisfying the phase-matching conditions, i.e. their optical path lengths (OPLs) should be the same [20, 21], which means

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Summary

Introduction

Polarization beam splitter and rotator (PSR) plays a significant role in most photonic integrated circuits where polarization handling is needed, including telecom, datacom, quantum circuits, etc [1, 2]. Liu Liu and Yunhong Ding et al have demonstrated an efficient PSR by using two parallel straight strip waveguides with air top cladding [11] This PSR is compact with a length of ~30μm at 1550nm, it uses 100-nm gap for efficient coupling, which is not applicable for current standard foundry service [16]. The 3dB bandwidth of proposed PSR covers all the O-band range This design uses SiO2 as top-cladding, making it compatible with current multi-layer CMOS foundry services [16]

Principle and design
Simulation results
Fabrication tolerance analysis
Conclusion
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