Compact DC and Quasi-Static Capacitances Modeling of a-Si:H TFTs, Including Parasitic Capacitances

Abstract

This article presents a compact model for the drain current and capacitances of hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs). The model is valid in the deep and tail states regions of operations, with a smooth transition between the two. The model parameters were extracted independently in the two regions using the unified model and extraction method (UMEM). The subthreshold regime and series resistances are considered for the drain current modeling. For the capacitances, it was found that the bias-dependent parasitic capacitances play a dominant role. The model was validated with TCAD simulations, with very good agreement.