Abstract

A coupler is proposed to interface a hybrid dielectric-loaded plasmonic waveguide (HDLPW) with a silicon photonic slab waveguide. The HDLPW is firstly designed and optimized to attain the best tradeoff between the mode confinement and the propagation distance. The designed coupler is inspired from the taper configuration and numerically modeled through finite-difference time-domain (FDTD) simulation. The results demonstrate that a high confinement and low loss of the energy is achieved from a silicon photonic slab waveguide into the dielectric slot of area 50×200nm2 in the HDLPW. The transmission attained through the coupler with a compact size of 400nm is found to be as high as 80% (1dB). Further, the planar nature of taper configuration makes the coupler easy to fabricate using the state-of-the-art CMOS facilities. The proposed coupler is useful in enabling the integration between photonic and hybrid plasmonic waveguides and thus realizing on-chip hybrid integrated circuits.

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