Abstract

Field-programmable gate arrays (FPGAs) having software-like reconfigurability and hardware-like performance are adopted as developing platforms to implement complex systems, i.e., software-defined networks (SDNs). Ternary content-addressable memory (TCAM) is not present in modern FPGA, but rather it is used as a softcore where needed. The hardware structure of an FPGA is flexible but rigid; the elemental structure is fixed and can be used in a limited number of ways. Existing FPGA-based TCAMs exhaust one particular type of memory when a large size is implemented, resulting in a shortage of memory for the rest of the system. Our proposed architecture uses only those memory elements of FPGA that are redundant and not used by other parts. In this letter, the proposed architecture, comp-TCAM, combines both block RAM (BRAM) and lookup table RAM (LUTRAM) to implement the TCAM architecture; that eliminates the dependency on the type of memory and is adaptable to the requirement of the system. Evaluation results show the feasibility, scalability, and effectiveness of the proposed TCAM architecture compared to the existing TCAM architectures. The hardware resource utilization on Xilinx VIrtex-7 FPGA is reduced by 41.6% compared to state-of-the-art FPGA-based TCAM with no harm to the system’s performance providing a throughput of 21.06 Gbits/s.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call