Common mode voltage reduction PWM techniques for four-level open end winding induction motor drive with superior quality of output voltage

Abstract

Common mode voltage (CMV) variations in the dual inverter fed induction motor drives causes unwanted shaft voltage and bearing currents resulting in reduced the life time. Single dc-link dual inverters topologies eliminate CMV but generate a poor quality of output voltage with circulating currents. Exploiting the new pulse pattern for the isolated dc-link dual inverter, new scalar pulse width modulation (PWM) methods are proposed in this paper using the freedom of selection reference signals and carrier signals. These scalar PWM techniques reduce CMV to maximum permissible limits with good quality of output voltage. PWM techniques proposed in this paper can also be extended to N-level inverter. To validate the proposed PWM techniques numerical studies are carried out in MATLAB/simulink environment.