Abstract
In the above paper, the authors present theoretical formulations for the optimum load impedances, output power, and drain efficiency of class-J mode power amplifiers when a second-harmonic voltage component is added to the input node of the device. It is shown that the inclusion of a proper second-harmonic voltage at the gate node of the transistor improves the drain efficiency and output power. However, some errors have been found, which may affect the readers’ understanding. The reason why will be indicated in this letter.
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