Combining hardware and software codecs to enhance data channels in FPGA streaming systems

Abstract

This paper discusses a framework to apply compute-intensive data transforms (codecs) to data flowing through a channel between a CPU and an FPGA kernel on a heterogeneous streaming system. Codecs such as parallel compression are applied to data across a PCI-express channel in real-time, aiming to increase the effective bandwidth by using spare resources in both software and hardware. Other codecs such as encryption can be applied while minimising the loss in performance. Real-time encoding/decoding is performed by breaking up the data stream into segments for multiple threads to process different segments. This allows the interleaving of encoding, transmission and decoding on the CPU, hence the framework functions as a software pipeline. The capabilities of the framework are demonstrated using 4 compression codecs and an encryption codec on a Maxeler system. For example, 1.51x and 1.85x speed ups are observed respectively when delta compression and double to single precision floating point conversion are applied to the data being transmitted to/from an identity kernel on the FPGA. Similarly, a 1.61x speed up is observed when double-to-single precision floating point conversion is applied to data being transmitted to/from an FPGA kernel performing a Fast Fourier Transform.