Combinational digital circuit synthesis using Cartesian Genetic Programming from a NAND gate template

Abstract

Evolutionary synthesis of combinational digital circuits is a promising research area and many a success has been achieved in this field. This paper presents a new technique for the synthesis of combinational circuits by using Cartesian Genetic Programming (CGP) and uniform NAND gate based templates. Using a uniform gate template implies an ease in the fabrication process but in some instances, the number of gates required may increase which can be optimized by CGP. The mutation operator has been used for achieving convergence. A 2-bit multiplier and 4-bit odd parity generator circuits have been evolved for experimentation and comparison to previous results. The results obtained are compared to earlier work done in the same field. Moreover, the relationship of evolution time (in terms of number of generations) to the population size has been established and analyzed.