Abstract

This article studies a reliability mechanism for field-plate-assisted reduced surface field (RESURF) effect 225-V NDMOS devices based on anode hole oxide injection for carriers that are in thermal equilibrium with the surrounding lattice. The injection mechanism is facilitated by a unique combination of layout and application biases that result in electric field vectors pulling low-energy minority hole carriers into oxide traps that overlap the drain potential. The effect of this positive charge trapping along the field oxide is to inhibit the RESURF mechanism, while also weakening the gate oxide where it overlaps the drain that ultimately results in a rupture. To quantify the process, a new accelerated aging technique is described that uses the parasitic n-p-n bipolar parallel of the nMOS channel to significantly increase the number of holes while still maintaining the MOS application voltages needed to enable the mechanism. This provides a cost-effective way to accurately accelerate this reliability mechanism with significantly smaller lead times relative to using higher biases and temperatures. This technique is then used with technical computer-aided design (TCAD) analysis to determine the impact of different manufacturing variables, where process controls are introduced for targeted manufacturing limits that can eliminate this mechanism from occurring.

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