Abstract
This paper describes an algebraic method for determining the effect produced on the logical structure of a synchronous, delay-memory sequential machine by a transformation of input, output, and state coding. The logical structure of a combinational transducer is specified by a 0, 1 ``pseudopermutation'' array called a logic matrix. Procedures are developed for computing the logic matrices for series, disjoint, and parallel combinations in terms of the logic matrices of the subunits. The logic matrix for a transducer exhibiting reduced dependence is characterized. Code transformation of the inputs, outputs, and states of a sequential machine is described in terms of permutation matrices. The logic matrix of the equivalent transformed machine is given as a function of the initial logic matrix and the matrices specifying the transformation.
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