Abstract

Spread Spectrum (SPSP) Communication is the theoretical basis of Direct Sequence Spread Spectrum (DSSS) transceiver technology. Spreading code, modulation, demodulation, carrier synchronization and code synchronization in SPSP communications are the core parts of DSSS transceivers. This paper focuses on the code synchronization problem in SPSP communications. A novel code synchronization algorithm based on segment correlation is proposed. The proposed algorithm can effectively deal with the informational misjudgment caused by the unreasonable data acquisition times. This misjudgment may lead to an inability of DSSS receivers to restore transmitted signals. Simulation results show the feasibility of a DSSS transceiver design based on the proposed code synchronization algorithm. Finally, the communication functions of the DSSS transceiver based on the proposed code synchronization algorithm are implemented on Field Programmable Gate Array (FPGA).

Highlights

  • Software radio is a frontier technology in the field of wireless communications

  • Frequency domain synchronization has more advantages than the time domain synchronization, Such as the fact that it is better suited for avoiding interference and, in particular, for avoiding interference caused by the multi-path effect

  • The proposed code synchronization algorithm can deal with misjudgment caused by the unreasonable data acquisition time effectively

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Summary

Introduction

Software radio is a frontier technology in the field of wireless communications. Software radio has many advantages, such as modularization, high flexibility and good expansibility. The main problem of traditional serial code acquisition methods can be summarized as below: Because of the unreasonable data acquisition time signals transmitted by DSSS transmitters may not be accurately restored by the corresponding DSSS receiver. When using our proposed serial code acquisition, DSSS receivers can restore the signals transmitted by DSSS transmitter accurately, both in the time and the frequency domain. A novel serial code acquisition method based on segment correlation is proposed, which effectively solves the informational misjudgment caused by the unreasonable data acquisition time. The function of the different modules of the DSSS transceiver based on the proposed code synchronization algorithm was verified through MATLAB simulations. We can verify whether the original signal is restored by the computer In this manner, the feasibility of our proposed code synchronization algorithm was confirmed through the implementation of the DSSS transceiver on FPGA.

Spreading Code
Modulation and Demodulation
Carrier Synchronization
Code Synchronization Algorithm Based on the Segment Correlation
Overall Design of the Code Synchronization Module
Design of the Code Acquisition Module
Code Tracking
Simulation
BPSK Modulation
NCO Module
Low-Pass Filter
Code Acquisition
Code Synchronization
FPGA Implementation
PCB Design and Manufacture of the DSSS Transceiver System
FPGA Implementation of the Carrier Synchronization Module
FPGA Implementation of the Code Acquisition Module
FPGA Implementation of the Code Tracking Module
FPGA Implementation of Transmitter
FPGA Implementation of Receiver
Overall Experiment and Demonstration of DSSS Transceiver
Conclusions
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