CMOS-compatible low stress silicon nitride films for photonic integration

Abstract

Silicon nitride material is widely used in photonics and other disciplines such as biology, life sciences, data communication, and sensing. These applications benefit from that silicon nitride has a much broader wavelength transparency range, lower propagation loss and lower thermo-optical coefficient compared with silicon material. However, it is very difficult to deposit thick silicon nitride films on large size wafer directly, which introduces a larger tensile stress and may produce cracks. In this paper, a process to fabricate crack-free 400-nm-thick silicon nitride films was discussed, leveraging 200- mm silicon photonics platform, which is compatible with CMOS process. The silicon nitride layer was deposited on the buried oxide layer via low-pressure chemical vapor deposition in two steps, followed by annealing separately, which can effectively overcome the problem of excessive stress in the films. Chemical mechanical polish technique was applied to planarize the silicon nitride layer and the oxide cladding layer. Annealing improves the uniformity and reduces the stress of the silicon nitride films. Using this process, 1-μm-wide strip waveguide was obtained with low propagation losses for the C-band (0.65 dB/cm). Furthermore, the propagation loss of 0.9-μm-wide strip waveguide was measured to be 0.7dB/cm; the insertion loss of 1×2 multi-mode interference was less than 0.3dB and the non-uniformity was smaller than 10%; the insertion loss of crossing was approximately 0.17dB and the crosstalk was lower than -40dB.