CMOS Voltage-Controlled Negative Resistance Realization

Soumya Mourya,Raj Senani

doi:10.12691/ajeee-8-4-4

Abstract

In this communication, a new CMOS circuit configuration is proposed to realize a voltage-controlled negative resistance (VCNR) which has been implemented using only eight MOS transistors- all working in the saturation region. The value of the realized negative resistance is controlled by two identical and opposite external DC voltages. The workability of the proposed circuit has been confirmed by Cadence Virtuoso simulations and some sample results have been given. The proposed VCNR circuit has been shown to exhibit good linearity, has good variable negative resistance range from -1.05kΩ and -300Ω and offers a good operational frequency range up to around 100 MHz with total power dissipation between 0.5mW- 8.73mW only.

Highlights

Electronically-controllable resistors are preferred for integrated circuit (IC) applications and implementations rather than passive resistors fabricated on the IC chips because the latter occupy relatively much larger chip area and have limited accuracy
The grounded voltage-controlled resistances (VCR) proposed in [10,11,12,13,14,15,16,21,22,23,24] employ MOS transistors operating in triode/saturation regions in which those operating in the former regime exhibit a square nonlinearity in the expression of their drain current which is canceled with an appropriately devised additional MOS-transistors-based circuitry
Many such linearized VCRs or more general linearized voltage-controlled impedances based upon such ideas of nonlinearitycancellation have been formulated with the help of a variety of analog building blocks such as operational amplifiers [2,3,4,5,7,17,18], Operational transconductance amplifiers (OTA) [19], second-generation Current Conveyors (CCII) as in [6], current feedback op-amps (CFOA) along with a JFET/MOSFET and a few resistors, as in [28,30] and CFOAs and an analog multiplier as in [29]

Summary

Introduction

Electronically-controllable resistors are preferred for integrated circuit (IC) applications and implementations rather than passive resistors fabricated on the IC chips because the latter occupy relatively much larger chip area and have limited accuracy. The various previously known VCNR circuits are as follows: In reference [8], a two-op-amp-FET-based VCNR is presented while references [17], [18] have presented universal voltage controlled impedance (VCZ) configurations employing two and three op-amps respectively, besides a JFET and a few resistors, both of which can be configured either as VCPR or VCNR as special cases These propositions suffer from the drawback of requiring a larger number of total active and passive components. The workability and the performance of the presented VCNR configuration have been demonstrated by the results of the simulations on CADENCE Virtuoso using 180 nm CMOS technology parameters

The Proposed VCNR Configuration

Simulation Results

Comparison with Previously Known VCNR Circuits and Concluding Remarks