CMOS readout circuit for piezo-resistive accelerometer

Abstract

A novel low power CMOS interface circuit for piezo-resistive accelerometer is presented, which is based on successive approximation. The interface circuit which can calibrate sensor’s zero offset includes amplifier, accumulator, comparator, bidirectional reversible counter, latch, start control logic, and D/A converter. The power of counter and comparer is cut off by start control logic after auto-zeroing to further reduce power dissipation. When the circuit gain is 500 and the input zero offset is 500 mV, the zero offset is 143.5 mV through the first stage of the interface circuit. Through the second stage of the interface circuit the zero offset is 1.9 mV, therefore, the interface circuit calibrates sensor’s zero offset successfully. The circuit is implemented in 0.5 μm CMOS process, the testing results indicate that the max auto-zeroing voltage is 500 mV, the resolution is 4 mV, and the power consumption is 4.62 mW.