CMOS low-noise amplifier linearization through body biasing

Abstract

A new linearization technique for CMOS low-noise amplifiers (LNAs) based on body biasing is presented. Analysis and measurement results show that the third order intercept point (IIP3) can be optimized using a proper body bias. The LNA, intended for wireless sensor network applications in the 2.4 GHz ISM Band, is implemented in a 0.13 ¿m CMOS technology. It achieves a nominal gain of 12.6 dB, 4.2 dB of noise figure (NF), and -4 dBm of IIP3 while drawing 3.4 mA from a 1 V supply. An 11 dBm peak in IIP3 occurs when adjusting the bulk to source voltage to -0.55 V, wherein the gain and NF reach 9 dB and 6.2 dB respectively, for a 2 mW overall power consumption.