CMOS low noise amplifier design trends towards millimeter-wave IoT sensors

Abstract

Millimeter Wave (mm-wave) technology is a prerequisite to ensure ubiquitous wireless communication, given the rapid growth of the Internet of Things (IoT) infrastructure that integrates emerging technologies such as virtual reality (VR), artificial intelligence (AI), etc. However, to ensure the future growth and acceptance of this technology, a highly efficient mm-wave compatible transceiver hardware is essential to be developed. A low noise amplifier (LNA) is one of the modules that directly influences the performance of an IoT transceiver. Numerous approaches have thus far been deployed in LNA design, such as differential cascode topology, active inductor, embedded input balun, transformer-based feedback, current reuse, stacked structure, and body biasing, to standardize various parameters e.g. die area, gain, noise figure, linearity, and power efficiency. Although complementary metal–oxide–semiconductor (CMOS) technology-based current LNA architectures in the mm-wave range suffer from substrate losses and device parasitic, it is regarded as a competitive solution for THz communication due to its inherent benefits of low-cost integrity, which promotes CMOS LNA design as an emerging research topic. This review presents several CMOS LNA architectures and perceives the adjustments of circuit topologies to ratify LNA structures in mm-wave applications. Furthermore, various state-of-the-art LNA design features are compared to envision CMOS LNA design directions and identify apposite circuit techniques suitable for the imminent 6G communication protocol. Therefore, this review will serve as a comparative study and reference for the future LNA design for the mm-wave sensor transceiver applications.