Abstract

Recent advances in deep submicron CMOS technologies and improved pixel designs have enabled CMOS-based imagers to surpass charge-coupled devices (CCD) imaging technology for mainstream applications. The parallel outputs that CMOS imagers can offer, in addition to complete camera-on-a-chip solutions due to being fabricated in standard CMOS technologies, result in compelling advantages in speed and system throughput. Since there is a practical limit on the minimum pixel size (4∼5 μm) due to limitations in the optics, CMOS technology scaling can allow for an increased number of transistors to be integrated into the pixel to improve both detection and signal processing. Such smart pixels truly show the potential of CMOS technology for imaging applications allowing CMOS imagers to achieve the image quality and global shuttering performance necessary to meet the demands of ultrahigh-speed applications. In this paper, a review of CMOS-based high-speed imager design is presented and the various implementations that target ultrahigh-speed imaging are described. This work also discusses the design, layout and simulation results of an ultrahigh acquisition rate CMOS active-pixel sensor imager that can take 8 frames at a rate of more than a billion frames per second (fps).

Highlights

  • This paper presents a review of the existing CMOS high-speed imager designs and discusses the various implementations that target ultrahigh-speed imaging

  • The frame rates (FR) discussion presented in this paper does not include the integration time because it assumes that the integration time is fixed for all pixels and in all three readout architectures, which is the case in voltage-domain imagers

  • We propose the design of an ultrahigh-speed active pixel sensor (APS) that can capture 8 frames at an acquisition rate of 1.25 billion fps

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Summary

Introduction

Emerging imaging applications, such as integral machine vision, time-of-flight (TOF) imaging, topographic imaging, three-dimensional high-definition television (3D-HDTV) and optical molecular imaging systems, fluorescence life-time imaging (FLIM), have resulted in significant research efforts in designing high-speed imagers [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17]. Since digital transistors take more advantage of CMOS scaling properties, digital pixel sensors (DPS) have become very attractive Such smart pixels truly show the potential of CMOS technology for imaging applications allowing CMOS imagers to achieve the image quality and global shuttering performance necessary to meet the demands of ultrahigh-speed applications. Rather, averaging a number of repeated measurements in narrow sampling windows or gates [Figure 1 (b)] have been shown to be more effective [19] Such high frame-rate applications require a fast and sensitive CMOS imager. The photodiode must be very sensitive as well, which may require the use of avalanche-photodiodes (APD) [20] Another high-speed imaging application is proton radiography [21], which is a new tool for advanced hydrotesting.

Digital Readout Architectures
Array-Level Techniques
H V ADC RO
Pixel-Level Techniques
Analog Readout Architectures
Ultrahigh-Speed CMOS Imager
Conclusions

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