CMOS hybrid couplers with improved phase inverter structure for D‐band applications

Abstract

This study describes a class of D-band hybrid couplers employing a structurally improved phase inverter in a standard CMOS technology. The proposed phase inverter, which consists of an inverter core and two quasi-parallel striplines along with two slots for impedance matching improvement, is characterised by an equivalent circuit model to facilitate the design procedure. A 180° coupler deploying the phase inverter features 38% size reduction and over 60% bandwidth improvement compared with its conventional counterparts. The proposed rat-race coupler achieves an insertion loss of around 1.1 and 30 dB isolation bandwidth of over 31 GHz, with a peak isolation of 41 dB at 118 GHz. A 90° coupler using the phase inverter demonstrates a return loss and isolation of 14 and 18 dB, respectively, in the whole D-band range. The measured amplitude and phase imbalances for the broadband coupler are, respectively, within 1 dB and 6° from 110 to 160 GHz. Both couplers can be inherently integrated with millimetre-wave circuits for on-chip system applications.