Abstract
This study proposes a hybrid electric double layer (EDL) with complementary metal-oxide semiconductor (CMOS) process compatibility by stacking a chitosan electrolyte and a Ta2O5 high-k dielectric thin film. Bio-inspired synaptic transistors with excellent electrical stability were fabricated using the proposed hybrid EDL for the gate dielectric layer. The Ta2O5 high-k dielectric layer with high chemical resistance, thermal stability, and mechanical strength enables CMOS-compatible patterning processes on biocompatible organic polymer chitosan electrolytes. This technique achieved ion-conduction from the chitosan electrolyte to the In-Ga-Zn oxide (IGZO) channel layer. The on/off current ratio, subthreshold voltage swing, and the field-effect mobility of the fabricated IGZO EDL transistors (EDLTs) exhibited excellent electrical properties of 1.80 × 107, 96 mV/dec, and 3.73 cm2/V·s, respectively. A resistor-loaded inverter was constructed by connecting an IGZO EDLT with a load resistor (400 MΩ) in series. This demonstrated good inverter action and responded to the square-wave input signals. Synaptic behaviours such as the hysteresis window and excitatory post-synaptic current (EPSC) variations were evaluated for different DC gate voltage sweep ranges and different AC gate spike stimuli, respectively. Therefore, the proposed organic–inorganic hybrid EDL is expected to be useful for implementing an extremely compact neural architecture system.
Highlights
This study proposes a hybrid electric double layer (EDL) with complementary metal-oxide semiconductor (CMOS) process compatibility by stacking a chitosan electrolyte and a Ta2O5 high-k dielectric thin film
This study proposes bottom-gate top-contact structure synaptic transistors that are gated by an organic–inorganic hybrid EDL
The CMOS-compatible patterning processes on the organic polymer chitosan electrolytes were successfully conducted through the stacking of a biodegradable chitosan electrolyte and the T a2O5 high-k dielectric thin film
Summary
This study proposes a hybrid electric double layer (EDL) with complementary metal-oxide semiconductor (CMOS) process compatibility by stacking a chitosan electrolyte and a Ta2O5 high-k dielectric thin film. The Ta2O5 high-k dielectric layer with high chemical resistance, thermal stability, and mechanical strength enables CMOS-compatible patterning processes on biocompatible organic polymer chitosan electrolytes. This technique achieved ion-conduction from the chitosan electrolyte to the In-Ga-Zn oxide (IGZO) channel layer. Despite the advantages of chitosan-based EDL, organic electrolyte-based EDLTs are hard to apply for the conventional complementary metal-oxide semiconductor (CMOS) process This is attributed to their low chemical resistance, thermal, and ambient instabilities[24]
Sign-in/Register to view highlights & summary Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
