Abstract

We demonstrated a low-loss CMOS-compatible multi-layer platform using monolithic back-end-of-line (BEOL) integration. 0.8dB/cm propagation loss is measured for the PECVD Si₃N₄ waveguide at 1580nm wavelength. The loss is further reduced to 0.24dB/cm at 1270nm wavelength, justifying the platform's feasibility for O-band operation. An inter-layer transition coupler is designed, achieving less than 0.2dB/transition loss across 70nm bandwidth. This is the lowest inter-layer transition loss ever reported. A thermally tuned micro-ring filter is also integrated on the platform, with performance comparable to similar device on SOI platform.

Highlights

  • Silicon photonics technology has drawn extensive global research attention for optical communication, driven by its device compactness, low cost and potential monolithic integration with electronics devices

  • We present our recent development on the multi-layer Si3N4-on-SOI platform using CMOS-compatible back-end process

  • By suppressing the scattering loss, 0.8 dB/cm propagation loss is achieved with a 600nm-height Plasma enhanced chemical vapor deposition (PECVD) Si3N4 waveguide at λ = 1580nm

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Summary

Introduction

Silicon photonics technology has drawn extensive global research attention for optical communication, driven by its device compactness, low cost and potential monolithic integration with electronics devices. The technology advancement has been largely relied on the silicon-on-insulator (SOI) platform over the past decade, with the demonstration of high performance passive devices, modulators, photo-detectors and their integration for complex photonic functionality [1, 2]. The additional optical device layers offer various revenues in terms of denser integration [4], lower loss [5], better device performance [6,7,8] and fabrication tolerance [9]. The main difference comes from the deposition temperature of the optical device layer material, resulting in the trade-off between platform loss and fabrication complexity. The solutions are far from satisfactory, due to the increased process complexity and device foot print These approaches post significant difficulty when comes to active device integration and scale-up for more optical layers. Thermo-optic devices are included, illustrating the platform’s expandability to include active device integration

Integration process flow for Si3N4-on-SOI multi-layer platform
Experiments and result discussion
Conclusions

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