CMOS compatible HV gate-shifted LDD-NMOS

P.M Santos,M.I.C Simas,M Lanca,A.P Casimiro

doi:10.1109/16.918255

CMOS compatible HV gate-shifted LDD-NMOS

P.M Santos, M.I.C Simas + Show 2 more

https://doi.org/10.1109/16.918255

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Journal: IEEE Transactions on Electron Devices	Publication Date: May 1, 2001
Citations: 16

#Lightly Doped Drain #Submicron CMOS Technology + Show 8 more

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Abstract

This brief presents an improvement of lightly doped drain (LDD) FET based on a drain engineering technique-the gate-shifting. Gate-shifted LDD (GSLDD) devices were fabricated in a submicron CMOS technology with no extra processing steps. Breakdown voltages in the range of 50 V and specific ON-resistances in the range of 2-4 m/spl Omega//spl middot/cm/sup 2/ were attained.

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