CMOS compatible fabrication methods for submicron Josephson junction qubits

Abstract

The authors have developed two distinct processes for the fabrication of mesoscopic Josephson junction qubits that are compatible with conventional CMOS processing. These devices, based on superconducting Al/Al/sub 2/O/sub 3//Al tunnel junctions, are fabricated by electron beam lithography using single-layer and multilayer resists. The new single-layer resist process is found to have significant advantages over conventional fabrication methods using suspended tri-layer shadow masks. It is simpler and more accurate to implement, and avoids the significant areas of redundant metallisation that are an unavoidable by-product of the tri-layer shadow mask method.