CMOS analog divider and four-quadrant multiplier using pool circuits

Abstract

CMOS divider and four-quadrant multiplier circuits using the pool circuits are presented. Using CMOS differential amplifiers and MOS transistors biased in the saturation region, the new analog divider and multiplier are presented. Experimental and simulation results are given-to verify the theoretical analyses. The proposed circuits are expected to be useful in analog signal processing applications. >