CMOS Analog Amplifier Circuits Design Using Seeker Optimization Algorithm

Abstract

This article proposes an area optimized design approach for two different analogue VLSI circuits: current mirror load based CMOS differential amplifier circuit and CMOS two-stage operational amplifier. The evolutionary method utilized for these optimal designs is the Seeker Optimization Algorithm (SOA). Human searching capability and understanding are modelled in SOA. In SOA, the search direction is based on the empirical gradient, and the step length is based on some simple fuzzy rule. In this article, SOA is employed to optimize the sizes of the MOS transistors to reduce the overall MOS area occupied by the circuit while satisfying the design constraints. The results obtained from the SOA technique are validated in SPICE environment. SPICE-based simulation results justify that SOA is a much better technique in comparison with the other formerly reported methods for the designs of the circuits mentioned above in terms of MOS area, gain, power dissipation, etc.