CMOS (2.28 mW, 67.28–80.78 GHz) divide‐by‐4 direct injection‐locked frequency divider using tunable LC source‐degeneration

Abstract

AbstractA 67.28–80.78 GHz CMOS divide‐by‐4 direct injection‐locked frequency divider (DILFD4) using tunable LC source‐degeneration (TLCSD) for operation frequency and locking range (LR) enhancement is demonstrated.The TLCSD is made by adding two tunable LC tanks, where varactors are used as the required capacitors, to the source terminals of the cross‐coupled transistor pair of the DILFD4. Compared with the traditional cross‐coupled transistor pair, the proposed one significantly decreases the equivalent parallel capacitance (CEQ). This in turn results in the increase of both the operation frequency and the LR of the DILFD4. The DILFD4 dissipated 2.28 mW from a 1.2 V power supply and achieved a total LR of 18.24% (i.e., 13.5 GHz, from 67.28 to 80.78 GHz). Furthermore, the DILFD4 achieved excellent output phase‐noise of −137.14 dBc/Hz at 1 MHz offset when the input signal was locked at 68.116 GHz. The chip area was 1.025 × 0.765 mm2 excluding the test pads. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:2776–2781, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26385