Abstract

In this paper, the closed-loop performance of voltage-doubler power factor correction (VD PFC) converter under dynamic evolution control (DEC) scheme is examined. The VD PFC circuit mainly used for enhancing low-line efficiency with reduced conduction and switching losses is essentially required to operate at high duty ratio (say $D > 0.5$ ). The proposed DEC scheme ensures this operating feature even under transient conditions. Since, researchers have not focused on the dynamic performance of the closed-loop controller for the VD PFC converter, the effectiveness of the proposed DEC technique is comparatively evaluated by implementing it in different control loops. In this paper, the DEC is separately implemented in voltage control loop and in current control loop which is termed as VC-DEC scheme and current-controlled DEC (CC-DEC) scheme, respectively. The dynamic performance (quick response of desired output) and VD property of the VD PFC converter under the open-loop condition, VC-DEC scheme, CC-DEC scheme are tested at a low-line input range of 70–100 $V_{\mathrm{ rms}}$ to justify its characteristics of enhanced low-line efficiency. Besides, its performance is tested for different loading conditions based on several key performance indices. The relevant switching functions for VD PFC converter are derived by considering its system dynamics and corresponding loop dynamic. A hardware prototype of 390 $V_{\mathrm{ DC}}$ , 1.5-kW VD PFC is designed with the controller being implemented using MATLAB/Simulink and dSPACE1104 interface.

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