Closed-Loop Capacitor Voltage Balancing Scheme for Modular Multilevel Converters Operated in Switching-Cycle Balancing Mode

Abstract

Modular Multilevel Converters (MMCs) have attracted tremendous research interest for high/medium-voltage applications due to their superior features of scalability and modularity. While successfully commercialized for a few applications, MMCs are hampered in their further widespread adoption due to voluminous cell capacitors. Recently a new switching-cycle-balancing control was proposed. It has the potential to balance cell capacitor voltages in the timescale of a switching period by alternating circulating current multiple times in a switching cycle. This greatly decreases the required cell capacitance and also enables MMC dc-dc operation. Yet, the capacitor voltage balancing effectiveness is susceptible to non-ideal factors like parameter and measurement errors. Therefore, a closed-loop balancing scheme is critical to fully achieve effective switching-cycle balancing. However, due to the very high frequency circulating current alternations, subsequent extremely fast regulation, and heavily coupled control parameters, the closed-loop balancing control presents a huge challenge. The letter aims to address these challenges and develop an effective closed-loop voltage balancing scheme. The mathematical foundations of the proposed control are laid, and the proposed scheme is verified using a custom-built 10 kV SiC MOSFET-based MMC under 18 kV dc-link voltage.