Abstract
A clockless, continuous-time (CT) analog correlator circuit realization is presented based on time-encoded analog signal processing. Voltage-controlled oscillators (VCOs) transform the analog voltage signals into time-encoded analog signals and, in the process, perform signal integration; CT, digital-style delay cells combined with phase-frequency detectors followed by capacitive summers implement a CT matched filter. The correlator prototype designed in 65-nm CMOS-LP technology consumes 37 nW from 0.54 V and is used in the baseband of a wake-up receiver to despread asynchronous code-division multiple access (CDMA) codes and demonstrate code-domain filtering for an 11-bit Barker code. The wake-up receiver's sensitivity is enhanced by 2 dB to -80.9 dBm for a missed detection ratio of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> , and its selectivity is improved by 5 dB, thanks to the use of the correlator. Simultaneous wake-up using CDMA is demonstrated with selective responses of the receiver to different desired codes in the presence of an undesired code.
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