Abstract

This article reviews and classifies the representative types of “differential power processing (DPP)” architectures, focusing on the aspect of how the processed power is reduced with DPP. Comparing with existing review works on this topic, this article provides new viewpoints from three perspectives. First, the differential power <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{{\text {diff}}}$ </tex-math></inline-formula> at both architecture level and converter level is discussed. For the calculation of the total processed power in a power architecture, instead of summing up the output power <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{{\text {out}}}$ </tex-math></inline-formula> delivered by the DPP converters, we account for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{{\text {diff}}}$ </tex-math></inline-formula> inside the DPP converters because direct power exists not only at the architecture level but also at the converter level, and thus, the power processed in a converter may be lower than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{{\text {out}}}$ </tex-math></inline-formula> . Second, the VA area modeling is applied to the DPP architectures to illustrate and visualize the processed power in the power architectures and converters, thus analyzing and comparing them at high level. Finally, the processed power of different DPP architectures is compared quantitatively with statistical analysis for varied operating situations.

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