Circuits simulation of switch devices furnished with gain cell combined to FeRAM

Abstract

This paper has described a new concept on programmable switch device furnished with gain cell combined to FeRAM. Compared with memories but ferroelectric memories under many aspects, they have even been favorably labeled the ideal memory because of their non-volatility, ease of programming and operation by low voltage. As the programming switch, which is very attractive for logic application, SRAM, anti-fuse, flash type devices are well known. They have been required that satisfy non-volatility and low-voltage programming simultaneously. Some structures with ferroelectric material have been proposed and studied as solution of these problems. However, it seemed hard that these type devices are realized now from a viewpoint of fabrication process and low voltage operation. Therefore, we propose a new switch device furnished with gain cell combined to FeRAM. We have studied and simulated this switch device by SPICE. This basic circuit is composed of two blocks. One is switching block that includes gain cell, and the other is memory block that is FeRAM. Circuits, which we designed, amplify bit line's voltage up to Vdd or ground at sense amplification according to FeRAM data. The bit line voltage determines the logic state for gate electrode of switch transistor. The way to read is destructive read out. However, we can transfer information of bit line voltage during plate line is low-level voltage. The way to write FeRAM is similar to conventional way. It is revealed that the basic circuit with FeRAM connected gain cell could work correctly in simulation. In addition, this kind of device is hopeful of many logic applications.