Circuits Optimization and System Linearization for High Efficiency and Wideband Envelope Tracking Architecture

Abstract

To improve bandwidth, efficiency and linearity of Envelope Tracking (ET) architecture, it is necessary to optimize the performance of envelope supply modulator and linearize nonlinear behavior of the ET system. The optimization procedure of the supply modulator is proposed based on the equivalent circuit model. The frequency compensation network is used to improve the bandwidth and linearity of the modulator circuit. An envelope enhanced memory polynomial digital pre-distortion model is introduced to address the nonlinear distortion of the ET system. The practical circuit mentioned above is fabricated and the overall experimental system is set up. Measurement results show that the ET PA at S-band obtains measured efficiency 61%, 54%, 44% and Error Vector Magnitude (EVM) 1% for 6.7 dB PAPR signals with 5 MHz/10 MHz/20 MHz modulation bandwidths, respectively. The ET system exhibits competitive bandwidth, efficiency and linearity, which verifies the proposed optimization and linearization methodology.