Circuit transients due to arcs on a high-voltage solar array

Abstract

A simple analytical model has been developed to estimate the effects of negative bias arcs on solar-array power system performance. Solar cell circuit characteristics, plasma conduction to interconnects, stored charge at interconnects and power system loading are modeled approximately by a linear, lumped-element, transient circuit defined with reference to a chosen solar array operating point. Both the thermal ion and ram ion cases are considered. Numerical results for the typical case of a 508-V array consisting of 1000 x 1500, 2 x 2 cm silicon solar cells operating at 80% power are given. The model predicts that such an array is expected to float with about 92% of its area below plasma ground. Arcs incident on the negative terminal of amplitudes as great as 200 A are predicted to produce common mode transients of the negative terminal no greater than about 200 V and differential transients across a resistive load no greater than 1/10 this value. Arcs of substantially less than 100 A amplitude produce small common-mode transient amplitudes and quite negligible differential transient amplitudes.