Circuit design of RRAM-based neuromorphic hardware systems for classification and modified Hebbian learning

Abstract

This paper proposes a solution to the learning of neuromorphic hardware systems based on metal-oxideresistive random access memory (RRAM) arrays, which are used as binary electronic synapses. A modified Hebbian learning method is developed to update the binary synaptic weights, and mixed-signal circuits are designed to implement the proposed learning method. The circuits are verified by SPICE, and systematic simulations are also conducted to verify the capability of the neuromorphic system to process relatively large databases. The results show that the system presents high processing speed ($10^6$ examples per second) for both classification and learning, and a high recognition accuracy (up to 95.6%) on the MNIST database.