Circuit design considerations for integrated high switching frequency buck converter

Abstract

nowadays, manufacturers of power management integrated circuits (PMICs) are producing devices that integrate many of the functional blocks required in power supplies in single tiny chips. This paper highlights the circuit design considerations as a part of highly integrated, high switching frequency (few MHz range) PMICs optimized to be fabricated using CMOS fabrication technologies. Moreover, the effect of parasitic elements associated with integration of the driver and the power MOSFET gate parasitic elements on the performance of an integrated buck converter and its effect on the switching time and loss in power MOSFETs have been investigated. Finally, a driver has been tested using spice simulations to validate the theory and then experimental results have been presented.