Abstract
Today, an electron spin qubit on silicon appears to be a very promising physical platform for the fabrication of future quantum microprocessors. Thousands of these qubits should be packed together into one single silicon die in order to break the quantum supremacy barrier. Microelectronics engineers are currently leveraging on the current CMOS technology to design the manipulation and read-out electronics as cryogenic integrated circuits. Several of these circuits are RFICs, as VCO, LNA, and mixers. Therefore, the availability of a qubit CAD model plays a central role in the proper design of these cryogenic RFICs. The present paper reports on a circuit-based compact model of an electron spin qubit for CAD applications. The proposed model is described and tested, and the limitations faced are highlighted and discussed.
Highlights
Relevant mathematical problems in several technical and scientific fields, such as computational chemistry or cryptography, require an amount of computing resources superpolynomial with the size of the problem, even when addressed with the best traditional algorithms
The present paper reports on a circuit-based compact model of an electron spin qubit for Computer Aided Design (CAD) applications
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Summary
Relevant mathematical problems in several technical and scientific fields, such as computational chemistry or cryptography, require an amount of computing resources superpolynomial with the size of the problem, even when addressed with the best traditional algorithms. Suggested by Reilly [16] and first investigated by Charbon et al [17], cryogenic CMOS integrated circuits seem to be a promising approach, because they make it possible to place the manipulation and read-out functionalities close to the qubits [18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35] These circuits include ADC, DAC, multiplexers, microwave oscillators, PLL, LNA, and mixers, making a quantum microprocessor similar to a mixed-signal circuit rather than to a purely digital circuitry.
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