Abstract

Hybrid automatic repeat request (HARQ) is used in high‐speed uplink packet access (HSUPA) to increase the data rate. Chase combining is the simplest of HARQ algorithms. It provides a time diversity and requires a small memory. In this paper, we propose a technique to increase the chase combining efficiency. In this method, HARQ transmissions are seen as additional receive antennas which are jointly combined at chip‐level using a space‐time linear minimum square error (LMMSE). We demonstrate that the chase combining diversity gain is considerably increased especially for high‐order modulation.

Highlights

  • High-speed uplink packet access (HSUPA) is designed to reach high data rates in universal mobile telecommunications system (UMTS) uplink

  • Hybrid automatic repeat request (HARQ) transmissions are seen as additional receive antennas which are jointly combined at chip-level using a space-time linear minimum square error (LMMSE)

  • There are two wellknown HARQ algorithms used for high-speed uplink packet access (HSUPA): chase combining and incremental redundancy (IR) [1]

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Summary

Introduction

High-speed uplink packet access (HSUPA) is designed to reach high data rates in universal mobile telecommunications system (UMTS) uplink. In [3], authors have shown that the LMMSE chip-level equalizer with receive diversity provides a significant performance enhancement for high speed downlink packet access (HSDPA). Its performance is severely degraded in fading channels when it is used with chase combining for high-order modulation To overcome this performance degradation, we propose a chip-level combining method based on LMMSE chip equalizer which is an interference resistant receiver. The different HARQ transmissions (receive antennas) are jointly exploited by a single LMMSE filter to provide the equalized chip as the combining result. In this manner, we jointly benefit from the time diversity provided by the multipath channel, and the space diversity offered by the receive antennas. A considerable gain is provided in the case of high-order modulation

HSUPA System Overview
System Model
Chip-Level Combining
Simulation and Results
Conclusion
Full Text
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